Agnisys, Inc.®, the leading EDA provider of the industry's most comprehensive solution for Design and Verification of SoC Hardware/Software Interface (HSI), today announced availability of a unique AI-based approach for specification of assertions and a new product to support FPGA development.
Agnisys delivers a complete automated flow from register and sequence specification to assembly, design, verification, and validation of intellectual property (IP) and complex system-on-chip (SoC) devices using application-specific integrated circuit (ASIC) or FPGA silicon technology.
Artificial intelligence (AI) methods, especially machine learning (ML), are being deployed in several key applications for the design and verification of IP and SoCs. Agnisys has made an important contribution to this industry trend with the development of iSpec.ai, which uses AI and ML techniques to translate English descriptions of design intent into SystemVerilog Assertions (SVA). This new technology enables engineers to leverage the power of assertions without having to learn the details of SVA, the most widely adopted format for properties used in simulation and formal verification.
Like any ML-based application, iSpec.ai relies on training to learn and get better over time. Agnisys made this technology available online to users several months ago to gather as many examples of natural language assertions as possible and ensure that they can be translated into SVA. This unique crowdsourcing approach has been key to maturing the technology. iSpec.ai is now available to the entire industry: anyone can visit the site, input text, and use the resulting SVA in their IP and SoC projects. iSpec.ai also translates SVA into English descriptions, valuable for understanding assertions in licensed or inherited code, and for documenting all assertions.
"We invite all designers and verification engineers to try iSpec.ai and give us some of your most complex ideas for assertions," said Anupam Bakshi, Agnisys CEO and Founder. "I think that you will find it fun to experiment on the site and to help us make an exciting new technology even better. We strongly encourage your feedback, which is easy to provide with the click of a button."
Solutions for specification automation have their roots in ASIC development. Historically, SoCs and other massive chips were beyond the capabilities of FPGA technology. This is no longer the case; programmable devices are now commonly used to create some of the largest and most complex designs. Accordingly, FPGA development teams have adopted many of the design and verification tools and methodologies pioneered by their ASIC colleagues. All elements of the Agnisys solution, including iSpec.ai, are routinely used by FPGA teams.
Recognizing the increasing role that these designs play in the industry, Agnisys has released IDS-FPGA, a member of its industry-leading IDesignSpec™ (IDS) family. With IDS-FPGA, teams can cut their development time in half using automated code generation, IP generators, and smooth integration with their target FPGA vendor software. Features include:
- Support for Xilinx UltraScale+ IP-based design development
- Integration with Xilinx Vivado and Intel Quartus Prime
- Pre-captured ready-to-use IP library for target FPGA designs
"We have many users developing IP and SoCs using FPGAs," said Bakshi. "With the release of IDS-FPGA, they now have tighter integration with their silicon vendor's software. This will benefit our current users and make it even easier for additional teams to adopt our specification automation solution."
Agnisys will be exhibiting at the Design Automation Conference (DAC) on December 6-8 at Moscone Center in San Francisco. Engineers will be available to demonstrate all the company's solutions, including the new technologies. Visitors to the Agnisys booth 2516 will have the opportunity to win valuable prizes by using the ispec.ai site and answering quiz questions.